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    A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control

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    Author
    Sole, M. P.; Badami, K.; Deng, J.; Mavrogordatos, T.; Azarkhish, E.; Zahnd, L.; Cosentino, C.; Augustyniak, M.; Zha, Y.; Bischof, A.; Bergamini, L.; Dallemagne, P.; Emery, S.
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    Abstract
    This work introduces a highly integrated and a power-efficient SoC with 20 EMG sensing channels, a 32b RISC core with a host of peripherals and a companion RF transceiver chip in the 55 nm CMOS technology to enable real-time Osseo-integrated prosthesis control and is aimed at recovery of hand function after amputation. The EMG processing channels include temperature compensated pseudo-resistors in highly programmable gain stages, a 4th order Chebyshev low-pass filter with enhanced linearity and 12b SAR ADC operating in the programmable range of 1.2MS/s to 125kS/s for multichannel EMG signal digitization. The digital back-end includes an EMG pre-processing accelerator and a 32b RISC processor that optimizes the power-consumption of the companion RF transceiver to improve the power-efficiency of the the prosthesis control system.
    Publication Reference
    ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), pp. 73-76
    Year
    2019
    URI
    https://yoda.csem.ch/handle/20.500.12839/342
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