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    FOSS EKV2.6 Verilog-A Compact MOSFET Model

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    Grabinski, W.; Pavanello, M.; Souza, M. d.; Tomaszewski, D.; Malesinska, J.; Gluszko, G.; Bucher, M.; Makris, N.; Nikolaou, A.; Abo-Elhadid, A.; Mierzwinski, M.; Lemaitre, L.; Brinson, M.; Lallement, C.; Sallese, J.; Yoshitomi, S.; Malisse, P.; Oguey, H.; Cserveny, S.; Enz, C.; Krummenacher, F.; Vittoz, E.
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    Abstract
    The EKV2.6 MOSFET compact model has had a considerable impact on the academic and industrial community of analog integrated circuit design, since its inception in 1996. The model is available as a free open-source software (FOSS) tool coded in Verilog-A. The present paper provides a short review of foundations of the model and shows its capabilities via characterization and modeling based on a test chip in 180 nm CMOS fabricated via Europractice.
    Publication Reference
    ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC), pp. 190-193
    Year
    2019
    URI
    https://yoda.csem.ch/handle/20.500.12839/343
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