dc.contributor.author | Muller, C. T. | |
dc.contributor.author | Pons, M. | |
dc.contributor.author | Ruffieux, D. | |
dc.contributor.author | Nagel, J. L. | |
dc.contributor.author | Emery, S. | |
dc.contributor.author | Burg, A. | |
dc.contributor.author | et al. | |
dc.date.accessioned | 2021-12-09T14:03:59Z | |
dc.date.available | 2021-12-09T14:03:59Z | |
dc.date.issued | 2019 | |
dc.identifier.citation | 2019 15th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2019, pp. 285-288. | |
dc.identifier.uri | https://yoda.csem.ch/handle/20.500.12839/348 | |
dc.description.abstract | In this paper, we describe a systematic low-power design methodology for technologies that offer a strong body factor. Specifically, we explore both the body bias voltage and the supply voltage knobs in order to find the MEP (minimum energy point) for a constant target frequency. Our methodology accounts for process and temperature (PT) variations while charting the design space for a simple reference design. We then show how to scale the energy data of this reference design to any arbitrary design. A case study of a 32 bit RISC microprocessor achieves an energy estimation match of our significantly less complex estimation methodology within 1% of traditional signoff results. | |
dc.subject | Ions,Libraries,Optimization,Standards,Frequency measurement,Threshold voltage,Adaptation models | |
dc.title | Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC | |
dc.type | Proceedings Article | |
dc.type.csemdivisions | Div-M | |
dc.type.csemresearchareas | ASICs for the Edge | |
dc.identifier.doi | https://doi.org/10.1109/PRIME.2019.8787736 | |