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dc.contributor.authorMuller, C. T.
dc.contributor.authorPons, M.
dc.contributor.authorRuffieux, D.
dc.contributor.authorNagel, J. L.
dc.contributor.authorEmery, S.
dc.contributor.authorBurg, A.
dc.contributor.authoret al.
dc.identifier.citation2019 15th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2019, pp. 285-288.
dc.description.abstractIn this paper, we describe a systematic low-power design methodology for technologies that offer a strong body factor. Specifically, we explore both the body bias voltage and the supply voltage knobs in order to find the MEP (minimum energy point) for a constant target frequency. Our methodology accounts for process and temperature (PT) variations while charting the design space for a simple reference design. We then show how to scale the energy data of this reference design to any arbitrary design. A case study of a 32 bit RISC microprocessor achieves an energy estimation match of our significantly less complex estimation methodology within 1% of traditional signoff results.
dc.subjectIons,Libraries,Optimization,Standards,Frequency measurement,Threshold voltage,Adaptation models
dc.titleMinimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC
dc.typeProceedings Article
dc.type.csemresearchareasASICs for the Edge

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