Power Management Unit (PMU) IP Platform
dc.contributor.author | CSEM, ASICs for the Edge | |
dc.date.accessioned | 2023-06-06T11:16:24Z | |
dc.date.available | 2023-06-06T11:16:24Z | |
dc.date.issued | 2023 | |
dc.description.abstract | CSEM’s platform is particularly suitable for battery powered applications. It can support a wide range of operating conditions, as well as an ultra-low-power (ULP) deep-sleep / “retention” operating mode with extremely low quiescent current consumption (< 0.2μA). | en |
dc.identifier.citation | CSEM technical factsheet M12.23 | en_US |
dc.identifier.uri | https://hdl.handle.net/20.500.12839/1232 | |
dc.language.iso | en | en_US |
dc.rights | CC0 1.0 Universal | * |
dc.rights.uri | http://creativecommons.org/publicdomain/zero/1.0/ | * |
dc.subject | ultra-low-power | en_US |
dc.subject | PMU | en_US |
dc.subject | ASIC | en_US |
dc.subject | power management | en_US |
dc.title | Power Management Unit (PMU) IP Platform | en_US |
dc.type | Technical Factsheet | en_US |
dc.type.csemdivisions | BU-M | en_US |
dc.type.csemresearchareas | ASICs for the Edge | en_US |