A 32-kHz Bandwidth Reconfigurable Delta Sigma ADC providing up to 13 ENOB

Abstract

A solution including an input buffer with programmable gain, followed by a Delta Sigma Modulator (DSM) and a Decimation filter is provided. Additionally, the voltage reference buffers, the current generation and DC bias generators are integrated within this solution.

Publication Reference

CSEM technical factsheet M11.21

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