A 32-kHz Bandwidth Reconfigurable Delta Sigma ADC providing up to 13 ENOB

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dc.contributor.authorCSEM, ASICs for the edge
dc.date.accessioned2024-05-15T13:11:54Z
dc.date.available2024-05-15T13:11:54Z
dc.date.issued2021-11
dc.description.abstractA solution including an input buffer with programmable gain, followed by a Delta Sigma Modulator (DSM) and a Decimation filter is provided. Additionally, the voltage reference buffers, the current generation and DC bias generators are integrated within this solution.
dc.identifier.citationCSEM technical factsheet M11.21
dc.identifier.urihttps://hdl.handle.net/20.500.12839/1391
dc.language.isoen
dc.rightsCC0 1.0 Universal*
dc.rights.urihttp://creativecommons.org/publicdomain/zero/1.0/*
dc.titleA 32-kHz Bandwidth Reconfigurable Delta Sigma ADC providing up to 13 ENOB
dc.typeTechnical Factsheet
dc.type.csemdivisionsBU-M
dc.type.csemresearchareasASICs for the Edge
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